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interrupt controller - traducción al Inglés

DEVICE THAT IS USED TO COMBINE SEVERAL SOURCES OF INTERRUPT ONTO ONE OR MORE CPU LINES, WHILE ALLOWING PRIORITY LEVELS TO BE ASSIGNED TO ITS INTERRUPT OUTPUTS

Interrupt controller; Interrupt request register; Interrupt mask register; In-Service register; Interrupt Mask Register; Interrupt Request Register; In-Service Register; Embedded Programmable Interrupt Controller; PICs; Programmable Interrupt Controller; Computer Interrupt Equipment; Computer interrupt equipment; Interrupt service register

interrupt controller

общая лексика

IC

контроллер прерываний

микросхема (i8259A, i82489), устанавливаемая на системной плате для управления аппаратными прерываниями (их разрешение/запрещение, маскирование, установка приоритета и т.д.)

Смотрите также

controller; hardware interrupt; ICU; IMR; interrupt line; interrupt priority; IRQ

maskable interrupt

SIGNAL TO THE PROCESSOR EMITTED BY HARDWARE OR SOFTWARE INDICATING AN EVENT THAT NEEDS IMMEDIATE ATTENTION

Hardware interrupt; Interrupts; Software interrupt; Software Interrupt; Spurious Interrupt; Interrupt mask; Maskable interrupt; Masked interrupt; Level triggered interrupt; Edge triggered interrupt; Maskable interrupts; Interupt; Spurious interrupt; Trap (computing); Fault (computing); Interrupt line; Maskable Interrupt; Kernel trap; Interrupted; Interrupting; Interrupt handling; OS Trap; Shared interrupt; Interrupt (computing); IRQ affinity; Receive packet steering; Receive flow steering; Interrupt mechanism; Computer interrupt; Computer Interrupt

общая лексика

маскируемое прерывание

аппаратное прерывание (hardware interrupt), которое можно запретить (или разрешить) с помощью установки в специальном регистре процессора или контроллера прерываний (interrupt controller) маски прерываний для выполнения процессором более важной работы

антоним

nonmaskable interrupt

interrupt handler

COMPUTING FUNCTION TRIGGERED BY AN INTERRUPT

Interrupt service routine; Interrupt routines; Interrupt Handler; Interrupt Service Routine; FLIH; SLIH

общая лексика

IH

обработчик прерываний, подпрограмма обработки прерываний

процедура, получающая управление при возникновении прерывания конкретного типа. Обычно адреса обработчиков прерываний записаны в таблице векторов прерываний

синоним

ISR

Смотрите также

cumulative throughflow; fractional throughflow

Definición

Programmable Interrupt Controller

<integrated circuit> PIC A special-purpose {integrated circuit} that functions as an overall manager in an interrupt driven system. It accepts requests from the peripheral equipment, determines which of the incoming requests is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination. PICs typically have eight interrupt lines, and two PICs are often cascaded to provide 15 available interrupt lines. See also: Advanced Programmable Interrupt Controller. (2003-03-18)

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Wikipedia

Programmable interrupt controller

In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQ's relative priorities. Common modes of interrupt priority include hard priorities, rotating priorities, and cascading priorities. PICs often allow mapping input to outputs in a configurable way. On the PC architecture PIC are typically embedded into a southbridge chip whose internal architecture is defined by the chipset vendor's standards.

https://en.wikipedia.org/wiki/Programmable interrupt controller

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