Traduzione e analisi delle parole tramite l'intelligenza artificiale ChatGPT
In questa pagina puoi ottenere un'analisi dettagliata di una parola o frase, prodotta utilizzando la migliore tecnologia di intelligenza artificiale fino ad oggi:
- come viene usata la parola
- frequenza di utilizzo
- è usato più spesso nel discorso orale o scritto
- opzioni di traduzione delle parole
- esempi di utilizzo (varie frasi con traduzione)
- etimologia
Cosa (chi) è signal microprocessor - definizione
![VEB [[Kombinat Mikroelektronik Erfurt]] ''Karl Marx'' (MME) UC8810D (mask ROM version)](https://commons.wikimedia.org/wiki/Special:FilePath/Robotron UC8810D 004 1.jpg?width=200 "VEB [[Kombinat Mikroelektronik Erfurt]] ''Karl Marx'' (MME) UC8810D (mask ROM version)")
![[[Synertek]] Z8-03RS (piggy-back EPROM version)](https://commons.wikimedia.org/wiki/Special:FilePath/Synertek Z8 03RS 1.jpg?width=200 "[[Synertek]] Z8-03RS (piggy-back EPROM version)")
![sampling]]](https://commons.wikimedia.org/wiki/Special:FilePath/Sampled.signal.svg?width=200 "sampling]]")
Wikipedia
The Zilog Z8 is a microcontroller architecture, originally introduced in 1979, which today also includes the Z8 Encore!, eZ8 Encore!, eZ8 Encore! XP, and eZ8 Encore! MC families.
Signifying features of the architecture are up to 4,096 fast on-chip registers which may be used as accumulators, pointers, or as ordinary random-access memory (RAM). A 16-bit address space for between 1 kibibyte (KB) and 64 KB of either programmable read-only memory (PROM, OTP), read-only memory (ROM), or flash memory, are used to store code and constants, and there is a second 16-bit address space which can be used for large applications.
On chip peripherals include analog-to-digital converter (A/D), Serial Peripheral Interface (SPI) bus and Inter-Integrated Circuit (I²C) channels, IrDA encoders/decoders etc. There are versions with from 8 up to 80 pins, housed in dual in-line package (PDIP), Quad Flat No-leads package (MicroLeadFrame, MLF), small outline integrated circuit (SOIC), Shrink Small-Outline Package (SSOP), and low profile Quad Flat Package (LQFP). The eZ8 Encore! series can be programmed and debugged through a single pin serial communication interface.
The basic architecture, a modified (non-strict) Harvard architecture, is technically very different from the Zilog Z80. Despite this, the instruction set and assembly language syntax are quite similar to other Zilog processors: Load/store operations use the same LD mnemonic (no MOV or MOVEs), typifying instructions such as DJNZ, are the same, and so on.
An integrated development environment (IDE) named Zilog Developer's Studio (ZDS) can be downloaded from Zilog's website including an assembler. The edition of ZDS II targeting Z8 Encore! and newer derivatives also includes a free compiler claiming ANSI C89 compliance.
Primary competitors include the somewhat similar Microchip Technology PIC family, and all Intel 8051 descendants. Also more traditional von Neumann architecture based single chip microcontrollers may be regarded as competitors, such as the Motorola 6800, 6809 based Motorola 68HC11, the Hitachi H8 family, and Z80-derivatives, such as Toshiba TLCS-870, to name only a few.
