6x86 - definitie. Wat is 6x86
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Wat (wie) is 6x86 - definitie

MICROPROCESSOR
6x86; 6x86MX; Cyrix MII; 6x86L; Cyrix Cx6x86; Cyrix Cx686; Draft:Cyrix 6x86MX

6x86         
Cyrix 6x86         
<processor> (6x86) IBM and Cyrix's sixth-generation, 64-bit 80x86-compatible microprocessor. The 6x86 combines aspects of both RISC and CISC. It has a superscalar, superpipelined core, and performs register renaming, speculative execution, out-of-order completion, and {data dependency removal}. It has a 16-kilobyte primary cache and is socket-compatible with the Pentium P54C. It has four performance levels: PR 120+, PR 150+, PR 166+ and PR 200+. The chip was designed by Cyrix and is manufactured by IBM. The architecture of the 6x86 is more advanced than that of the Pentium, incorporating some of the features of Intel's Pentium Pro. At a given clock rate it executes most code more quickly than a Pentium would. However, its FPU is considerably less efficient than Intel's. {6x86/faqs/6x86_faqs.html">IBM FAQ (http://chips.ibm.com/products/x86/6x86/faqs/6x86_faqs.html)}, {6x86/faq-6x86.htm">Cyrix FAQ (http://cyrix.com/process/prodinfo/6x86/faq-6x86.htm)}. (1997-05-26)
Cyrix 6x86         
The Cyrix 6x86 (codename M1) is a sixth-generation, 32-bit x86 microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. It was originally released in 1996.

Wikipedia

Cyrix 6x86

The Cyrix 6x86 is a line of sixth-generation, 32-bit x86 microprocessors designed and released by Cyrix in 1995. Cyrix, being a fabless company, had the chips manufactured by IBM and SGS-Thomson. The 6x86 was made as a direct competitor to Intel's Pentium microprocessor line, and was pin compatible. During the 6x86's development, the majority of applications (office software as well as games) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget. This would later prove to be a strategic mistake, as the popularity of the P5 Pentium caused many software developers to hand-optimize code in assembly language, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anticipated first-person shooter Quake used highly optimized assembly code designed almost entirely around the P5 Pentium's FPU. As a result, the P5 Pentium significantly outperformed other CPUs in the game.