N-plus-one address instruction - определение. Что такое N-plus-one address instruction
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Что (кто) такое N-plus-one address instruction - определение

PROCESSOR REGISTER THAT INDICATES THE LOCATION IN MEMORY OF THE CURRENTLY-EXECUTING INSTRUCTION IN THE BINARY CODE OF A PROGRAM
Instruction pointer; Program Counter; Program register; Instruction address register; Programme counter; Instruction counter; Next instruction pointer; Current instruction pointer; Current instruction; Next instruction; Next instruction address; Next instruction pointer register; Instruction pointer register; Next instruction address register
  • Front panel of an [[IBM 701]] computer introduced in 1952. Lights in the middle display the contents of various registers. The '''instruction counter''' is at the lower left.

program counter         
<hardware> (PC, or "instruction address register") A register in the central processing unit that contains the addresss of the next instruction to be executed. The PC is automatically incremented after each instruction is fetched to point to the following instruction. It is not normally manipulated like an ordinary register but instead, special instructions are provided to alter the flow of control by writing a new value to the PC, e.g. JUMP, CALL, RTS. (1995-03-21)
Instruction Address Register         
(IAR) The IBM name for program counter. The IAR can be accessed by way of a supervisor call in supervisor state, but cannot be directly addressed in problem state. (1995-03-21)
Program counter         
The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence.

Википедия

Program counter

The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence.

Usually, the PC is incremented after fetching an instruction, and holds the memory address of ("points to") the next instruction that would be executed.

Processors usually fetch instructions sequentially from memory, but control transfer instructions change the sequence by placing a new value in the PC. These include branches (sometimes called jumps), subroutine calls, and returns. A transfer that is conditional on the truth of some assertion lets the computer follow a different sequence under different conditions.

A branch provides that the next instruction is fetched from elsewhere in memory. A subroutine call not only branches but saves the preceding contents of the PC somewhere. A return retrieves the saved contents of the PC and places it back in the PC, resuming sequential execution with the instruction following the subroutine call.