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Что (кто) такое buffer cache - определение
SOFTWARE-BASED, BLOCK-LEVEL CACHE OF DRIVE DATA STORED IN THE HOST COMPUTER'S MAIN MEMORY
Pagecache; Page Cache; Page caching; Disk page; Buffer cache
Найдено результатов: 319
Disk buffer
![A 500 GB [[Western Digital]] hard disk drive with a 16 MB buffer](https://commons.wikimedia.org/wiki/Special:FilePath/WD5000AAKX 16MB Buffer.jpg?width=200 "A 500 GB [[Western Digital]] hard disk drive with a 16 MB buffer")
HIGH-SPEED MEMORY EMBEDDED IN A COMPUTER DRIVE USED TO IMPROVE PERFORMANCE
Force Unit Access; Read-ahead; Read-behind
In computer storage, disk buffer (often ambiguously called disk cache or cache buffer) is the embedded memory in a hard disk drive (HDD) acting as a buffer between the rest of the computer and the physical hard disk platter that is used for storage. Modern hard disk drives come with 8 to 256 MiB of such memory, and solid-state drives come with up to 4 GB of cache memory.
buffer state
COUNTRY LOCATED BETWEEN TWO OTHER MUTUALLY HOSTILE COUNTRIES
Buffer State; Buffer states; Buffer republic; Buffer colony
(buffer states)
A buffer state is a peaceful country situated between two or more larger hostile countries.
Turkey and Greece were buffer states against the former Soviet Union.
N-COUNT
buffer state
COUNTRY LOCATED BETWEEN TWO OTHER MUTUALLY HOSTILE COUNTRIES
Buffer State; Buffer states; Buffer republic; Buffer colony
¦ noun a small neutral country situated between two larger hostile countries.
secondary cache
![Austek]] A38202; to the right of the processor)](https://commons.wikimedia.org/wiki/Special:FilePath/Motherboard Intel 386.jpg?width=200 "Austek]] A38202; to the right of the processor)")
![[[Motherboard]] of a [[NeXTcube]] computer (1990). At the lower edge of the image left from the middle, there is the CPU [[Motorola 68040]] operated at 25 [[MHz]] with two separate level 1 caches of 4 KiB each on the chip, one for the instructions and one for data. The board has no external L2 cache.](https://commons.wikimedia.org/wiki/Special:FilePath/NeXTcube motherboard.jpg?width=200 "[[Motherboard]] of a [[NeXTcube]] computer (1990). At the lower edge of the image left from the middle, there is the CPU [[Motorola 68040]] operated at 25 [[MHz]] with two separate level 1 caches of 4 KiB each on the chip, one for the instructions and one for data. The board has no external L2 cache.")
DYNAMICALLY MANAGED LOCAL MEMORY THAT MIRRORS MAIN MEMORY IN A MICROPROCESSOR TO REDUCE THE COST OF ACCESS
Level 1 cache; Level 2 cache; Cache line; CPU memory cache; Trace Caches; Trace caches; Cache block; Cache-line; L2 cache; L3 cache; L1 cache; CPU caches; CPU Cache; Data cache; Internal cache; Data Cache; First-level cache; L2-Cache; L1-Cache; Second-level cache; Secondary cache; Tag RAM; Direct mapped; Cpu cache; Instruction cache; L2 Cache; Cache flush; Motherboard cache; Discrete L2 cache; Level 3 cache; VIVT; VIPT; I cache; Processor cache; Internal and external cache; Multi-ported Cache; Smart Cache; CPU cache line; Copy-back; L4 cache; Micro-operation cache; Uop cache; Last level cache; Last Level Cache; Cache eviction; Exclusive CPU cache; Inclusive CPU cache; Exclusive cache; Inclusive cache; Multi-level cache; Multilevel cache; On-chip cache; Cache lines; Shared cache; Non-blocking cache; Branch target cache; Branch target instruction cache; SmartCache; Smart cache; L1d
<memory management> (Or "second level cache", "level two
cache", "L2 cache") A larger, slower cache between the
primary cache and main memory. Whereas the primary cache
is often on the same integrated circuit as the {central
processing unit} (CPU), a secondary cache is usually external.
(1997-06-25)
Data buffer
REGION OF A PHYSICAL MEMORY STORAGE USED TO TEMPORARILY STORE DATA WHILE IT IS BEING MOVED FROM ONE PLACE TO ANOTHER
Buffer (telecommunication); Packet buffering; Buffer (programming); Buffer (computer science); Memory buffer; Input buffer
In computer science, a data buffer (or just buffer) is a region of a memory used to temporarily store data while it is being moved from one place to another. Typically, the data is stored in a buffer as it is retrieved from an input device (such as a microphone) or just before it is sent to an output device (such as speakers).
Web cache
MECHANISM FOR THE TEMPORARY STORAGE (CACHING) OF WEB DOCUMENTS
Web caching; HTTP cache; Browser Cache; Browser Caching; Squirrel (DHT); Squirrel dht; Web caches; Proxy cache; Browser cache; Cache server; Internet cache; Http cache; HTTP caching; Webcache; Cache-Control; Web browser cache; Bypass your cache; Webcaching; List of server-side web caching software; Forward cache; Reverse cache
A Web cache (or HTTP cache) is a system for optimizing the World Wide Web. It is implemented both client-side and server-side.
Buffer state
COUNTRY LOCATED BETWEEN TWO OTHER MUTUALLY HOSTILE COUNTRIES
Buffer State; Buffer states; Buffer republic; Buffer colony
A buffer state is a country lying between two rival or potentially hostile great powers. Its existence can sometimes be thought to prevent conflict between them.
Underrun
STATE
Buffer under-run; Underrun; Buffer underflow; Seamless Link; Buffer underruns
·vt To run or pass under; especially (Naut.), to pass along and under, as a cable, for the purpose of taking it in, or of examining it.
cache line
DYNAMICALLY MANAGED LOCAL MEMORY THAT MIRRORS MAIN MEMORY IN A MICROPROCESSOR TO REDUCE THE COST OF ACCESS
Level 1 cache; Level 2 cache; Cache line; CPU memory cache; Trace Caches; Trace caches; Cache block; Cache-line; L2 cache; L3 cache; L1 cache; CPU caches; CPU Cache; Data cache; Internal cache; Data Cache; First-level cache; L2-Cache; L1-Cache; Second-level cache; Secondary cache; Tag RAM; Direct mapped; Cpu cache; Instruction cache; L2 Cache; Cache flush; Motherboard cache; Discrete L2 cache; Level 3 cache; VIVT; VIPT; I cache; Processor cache; Internal and external cache; Multi-ported Cache; Smart Cache; CPU cache line; Copy-back; L4 cache; Micro-operation cache; Uop cache; Last level cache; Last Level Cache; Cache eviction; Exclusive CPU cache; Inclusive CPU cache; Exclusive cache; Inclusive cache; Multi-level cache; Multilevel cache; On-chip cache; Cache lines; Shared cache; Non-blocking cache; Branch target cache; Branch target instruction cache; SmartCache; Smart cache; L1d
<storage> (Or cache block) The smallest unit of memory than
can be transferred between the main memory and the cache.
Rather than reading a single word or byte from main memory at
a time, each cache entry is usually holds a certain number of
words, known as a "cache line" or "cache block" and a whole
line is read and cached at once. This takes advantage of the
principle of locality of reference: if one location is read
then nearby locations (particularly following locations) are
likely to be read soon afterward. It can also take advantage
of page-mode DRAM which allows faster access to
consecutive locations.
(1997-01-21)
level 1 cache
DYNAMICALLY MANAGED LOCAL MEMORY THAT MIRRORS MAIN MEMORY IN A MICROPROCESSOR TO REDUCE THE COST OF ACCESS
Level 1 cache; Level 2 cache; Cache line; CPU memory cache; Trace Caches; Trace caches; Cache block; Cache-line; L2 cache; L3 cache; L1 cache; CPU caches; CPU Cache; Data cache; Internal cache; Data Cache; First-level cache; L2-Cache; L1-Cache; Second-level cache; Secondary cache; Tag RAM; Direct mapped; Cpu cache; Instruction cache; L2 Cache; Cache flush; Motherboard cache; Discrete L2 cache; Level 3 cache; VIVT; VIPT; I cache; Processor cache; Internal and external cache; Multi-ported Cache; Smart Cache; CPU cache line; Copy-back; L4 cache; Micro-operation cache; Uop cache; Last level cache; Last Level Cache; Cache eviction; Exclusive CPU cache; Inclusive CPU cache; Exclusive cache; Inclusive cache; Multi-level cache; Multilevel cache; On-chip cache; Cache lines; Shared cache; Non-blocking cache; Branch target cache; Branch target instruction cache; SmartCache; Smart cache; L1d
Википедия
Page cache
In computing, a page cache, sometimes also called disk cache, is a transparent cache for the pages originating from a secondary storage device such as a hard disk drive (HDD) or a solid-state drive (SSD). The operating system keeps a page cache in otherwise unused portions of the main memory (RAM), resulting in quicker access to the contents of cached pages and overall performance improvements. A page cache is implemented in kernels with the paging memory management, and is mostly transparent to applications.
Usually, all physical memory not directly allocated to applications is used by the operating system for the page cache. Since the memory would otherwise be idle and is easily reclaimed when applications request it, there is generally no associated performance penalty and the operating system might even report such memory as "free" or "available".
When compared to main memory, hard disk drive read/writes are slow and random accesses require expensive disk seeks; as a result, larger amounts of main memory bring performance improvements as more data can be cached in memory. Separate disk caching is provided on the hardware side, by dedicated RAM or NVRAM chips located either in the disk controller (in which case the cache is integrated into a hard disk drive and usually called disk buffer), or in a disk array controller. Such memory should not be confused with the page cache.
