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этимология

Что (кто) такое interrupt controller - определение

DEVICE THAT IS USED TO COMBINE SEVERAL SOURCES OF INTERRUPT ONTO ONE OR MORE CPU LINES, WHILE ALLOWING PRIORITY LEVELS TO BE ASSIGNED TO ITS INTERRUPT OUTPUTS

Interrupt controller; Interrupt request register; Interrupt mask register; In-Service register; Interrupt Mask Register; Interrupt Request Register; In-Service Register; Embedded Programmable Interrupt Controller; PICs; Programmable Interrupt Controller; Computer Interrupt Equipment; Computer interrupt equipment; Interrupt service register

Programmable Interrupt Controller

<integrated circuit> PIC A special-purpose {integrated circuit} that functions as an overall manager in an interrupt driven system. It accepts requests from the peripheral equipment, determines which of the incoming requests is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination. PICs typically have eight interrupt lines, and two PICs are often cascaded to provide 15 available interrupt lines. See also: Advanced Programmable Interrupt Controller. (2003-03-18)

PICS

Protocol Implementation Conformance Statements

PICS

Platform for Internet Content Selection (Reference: org., Internet)

Википедия

Programmable interrupt controller

In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQ's relative priorities. Common modes of interrupt priority include hard priorities, rotating priorities, and cascading priorities. PICs often allow mapping input to outputs in a configurable way. On the PC architecture PIC are typically embedded into a southbridge chip whose internal architecture is defined by the chipset vendor's standards.

https://en.wikipedia.org/wiki/Programmable interrupt controller