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Was (wer) ist cache coherency - definition

SPECIAL CASE OF MEMORY COHERENCE

Cache consistency; Coherence protocol; Cache Coherency; Cache Coherence; Cache coherence problems; Cache coherency; Coherence traffic; Coherency traffic; Cache coherent system; Write invalidate protocol; Write-invalidate protocol; Coherent cache; Cache states; Cache Consistency

cache coherency

<storage> (Or "cache consistency") /kash koh-heer'n-see/ The synchronisation of data in multiple caches such that reading a memory location via any cache will return the most recent data written to that location via any (other) cache. Some parallel processors do not cache accesses to {shared memory} to avoid the issue of cache coherency. If caches are used with shared memory then some system is required to detect when data in one processor's cache should be discarded or replaced because another processor has updated that memory location. Several such schemes have been devised. (1998-11-10)

Cache coherence

In computer architecture, cache coherence is the uniformity of shared resource data that ends up stored in multiple local caches. When clients in a system maintain caches of a common memory resource, problems may arise with incoherent data, which is particularly the case with CPUs in a multiprocessing system.

https://en.wikipedia.org/wiki/Cache_coherence

cache consistency

cache coherency

Wikipedia

Cache coherence

In computer architecture, cache coherence is the uniformity of shared resource data that ends up stored in multiple local caches. When clients in a system maintain caches of a common memory resource, problems may arise with incoherent data, which is particularly the case with CPUs in a multiprocessing system.

In the illustration on the right, consider both the clients have a cached copy of a particular memory block from a previous read. Suppose the client on the bottom updates/changes that memory block, the client on the top could be left with an invalid cache of memory without any notification of the change. Cache coherence is intended to manage such conflicts by maintaining a coherent view of the data values in multiple caches.

https://en.wikipedia.org/wiki/Cache coherence